;;; verilog-mode.el --- major mode for editing verilog source in Emacs
-;; Copyright (C) 1996-2015 Free Software Foundation, Inc.
+;; Copyright (C) 1996-2016 Free Software Foundation, Inc.
;; Author: Michael McNamara <mac@verilog.com>
;; Wilson Snyder <wsnyder@wsnyder.org>
;;
;; This variable will always hold the version number of the mode
-(defconst verilog-mode-version "2015-08-16-ce03c7a-vpo-GNU"
+(defconst verilog-mode-version "2015-09-18-314cf1d-vpo-GNU"
"Version of this Verilog mode.")
(defconst verilog-mode-release-emacs t
"If non-nil, this version of Verilog mode was released with Emacs itself.")
(put 'verilog-auto-wire-type 'safe-local-variable `stringp)
(defcustom verilog-auto-endcomments t
- "Non-nil means insert a comment /* ... */ after 'end's.
+ "Non-nil means insert a comment /* ... */ after `end's.
The name of the function or case will be set between the braces."
:group 'verilog-mode-actions
:type 'boolean)
automatically when it thinks necessary. A value of `ask' will query the
user when it thinks updating is needed.
-You should not rely on the 'ask or 'detect policies, they are safeguards
+You should not rely on the `ask' or `detect' policies, they are safeguards
only. They do not detect when AUTOINSTs need to be updated because a
sub-module's port list has changed."
:group 'verilog-mode-actions
(verilog-xl-2
"([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 1 3)
(verilog-IES
- ".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)" 2 3)
+ ".*\\*[WE],[0-9A-Z]+\\(\\[[0-9A-Z_,]+\\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)" 2 3)
(verilog-surefire-1
"[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 1 2)
(verilog-surefire-2
("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 1 bold t)
("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 3 bold t)
;; verilog-IES (nc-verilog)
- (".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 2 bold t)
- (".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 3 bold t)
+ (".*\\*[WE],[0-9A-Z]+\\(\\[[0-9A-Z_,]+\\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 2 bold t)
+ (".*\\*[WE],[0-9A-Z]+\\(\\[[0-9A-Z_,]+\\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 3 bold t)
;; verilog-surefire-1
("[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 1 bold t)
("[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 2 bold t)
;; non blocking assignment operator
"<="
;; comparison
- "==" "!=" "===" "!==" "<=" ">=" "==\?" "!=\?" "<->"
+ "==" "!=" "===" "!==" "<=" ">=" "==?" "!=?" "<->"
;; event_trigger
"->" "->>"
;; property_expr
"\\(\\<begin\\>\\)\\|" ; 1
"\\(\\<else\\>\\)\\|" ; 2
"\\(\\<end\\>\\s-+\\<else\\>\\)\\|" ; 3
- "\\(\\<always\\(?:_ff\\)?\\>\\(?:\[ \t\]*@\\)\\)\\|" ; 4 (matches always or always_ff w/ @...)
+ "\\(\\<always\\(?:_ff\\)?\\>\\(?:[ \t]*@\\)\\)\\|" ; 4 (matches always or always_ff w/ @...)
"\\(\\<always\\(?:_comb\\|_latch\\)?\\>\\)\\|" ; 5 (matches always, always_comb, always_latch w/o @...)
"\\(\\<fork\\>\\)\\|" ; 7
"\\(\\<if\\>\\)\\|"
'font-lock-preprocessor-face
'font-lock-type-face))
;; Fontify delays/numbers
- '("\\(@\\)\\|\\([ \t\n\f\r]#\\s-*\\(\\(\[0-9_.\]+\\('s?[hdxbo][0-9a-fA-F_xz]*\\)?\\)\\|\\(([^()]+)\\|\\sw+\\)\\)\\)"
+ '("\\(@\\)\\|\\([ \t\n\f\r]#\\s-*\\(\\([0-9_.]+\\('s?[hdxbo][0-9a-fA-F_xz]*\\)?\\)\\|\\(([^()]+)\\|\\sw+\\)\\)\\)"
0 font-lock-type-face append)
;; Fontify property/sequence cycle delays - these start with '##'
- '("\\(##\\(\\sw+\\|\\[[^\]]+\\]\\)\\)"
+ '("\\(##\\(\\sw+\\|\\[[^]]+\\]\\)\\)"
0 font-lock-type-face append)
;; Fontify instantiation names
'("\\([A-Za-z][A-Za-z0-9_]*\\)\\s-*(" 1 font-lock-function-name-face)
(verilog-forward-sexp))
(defun verilog-forward-sexp-function (arg)
- "Move forward a sexp."
+ "Move forward ARG sexps."
;; Used by hs-minor-mode
(if (< arg 0)
(verilog-backward-sexp)
(found nil)
(st (point)))
(if (not (looking-at "\\<"))
- (forward-word -1))
+ (forward-word-strictly -1))
(cond
((verilog-skip-backward-comment-or-string))
((looking-at "\\<else\\>")
(st (point))
(nest 'yes))
(if (not (looking-at "\\<"))
- (forward-word -1))
+ (forward-word-strictly -1))
(cond
((verilog-skip-forward-comment-or-string)
(verilog-forward-syntactic-ws))
(and (looking-at "fork")
(progn
(setq here (point)) ; sometimes a fork is just a fork
- (forward-word -1)
+ (forward-word-strictly -1)
(looking-at verilog-disable-fork-re))))
(progn ; it is a disable fork; ignore it
(goto-char (match-end 0))
- (forward-word 1)
+ (forward-word-strictly 1)
(setq reg nil))
(progn ; it is a nice simple fork
(goto-char here) ; return from looking for "disable fork"
;; Search forward for matching endclocking
(setq reg "\\(\\<clocking\\>\\)\\|\\(\\<endclocking\\>\\)" )))
(if (and reg
- (forward-word 1))
+ (forward-word-strictly 1))
(catch 'skip
(if (eq nest 'yes)
(let ((depth 1)
(looking-at verilog-disable-fork-re)
(and (looking-at "fork")
(progn
- (forward-word -1)
+ (forward-word-strictly -1)
(looking-at verilog-disable-fork-re))))
(progn ; it is a disable fork; another false alarm
(goto-char (match-end 0)))
will be inserted. Setting this variable to zero results in every
end acquiring a comment; the default avoids too many redundant
comments in tight quarters.
- `verilog-auto-lineup' (default 'declarations)
+ `verilog-auto-lineup' (default `declarations')
List of contexts where auto lineup of code should be done.
Variables controlling other actions:
- `verilog-linter' (default surelint)
+ `verilog-linter' (default `surelint')
Unix program to call to run the lint checker. This is the default
command for \\[compile-command] and \\[verilog-auto-save-compile].
(defun electric-verilog-semi-with-comment ()
"Insert `;' character, reindent the line and indent for comment."
(interactive)
- (insert "\;")
+ (insert ";")
(save-excursion
(beginning-of-line)
(verilog-indent-line))
The upper left corner is defined by point. Indices begin with 0
and extend to the MAX - 1. If no prefix arg is given, the user
is prompted for a value. The indices are surrounded by square
-brackets \[]. For example, the following code with the point
-located after the first 'a' gives:
+brackets []. For example, the following code with the point
+located after the first `a' gives:
a = b a[ 0] = b
a = b a[ 1] = b
;; stop if we see a named coverpoint
(looking-at "\\w+\\W*:\\W*\\(coverpoint\\|cross\\|constraint\\)")
;; keep going if we are in the middle of a word
- (not (or (looking-at "\\<") (forward-word -1)))
+ (not (or (looking-at "\\<") (forward-word-strictly -1)))
;; stop if we see an assertion (perhaps labeled)
(and
(looking-at "\\(\\w+\\W*:\\W*\\)?\\(\\<\\(assert\\|assume\\|cover\\)\\>\\s-+\\<property\\>\\)\\|\\(\\<assert\\>\\)")
((looking-at "\\<end\\>")
;; HERE
- (forward-word 1)
+ (forward-word-strictly 1)
(verilog-forward-syntactic-ws)
(setq err nil)
(setq str (verilog-get-expr))
(if (verilog-within-string)
(re-search-forward "\"" nil t)
(if (verilog-in-star-comment-p)
- (re-search-forward "\*/" nil t)
+ (re-search-forward "\\*/" nil t)
(let ((bpt (- (point) 2)))
(end-of-line)
(delete-region bpt (point))))))
(t
)))
((verilog-in-star-comment-p)
- (re-search-backward "/\*")
+ (re-search-backward "/\\*")
(insert (format " // surefire lint_off_line %6s" code )))
(t
(insert (format " // surefire lint_off_line %6s" code ))
(save-excursion
(if (not (file-exists-p (buffer-file-name buf)))
(error
- (concat "File not found: " (buffer-file-name buf))))
- (message (concat "Processing " (buffer-file-name buf)))
+ "File not found: %s" (buffer-file-name buf)))
+ (message "Processing %s" (buffer-file-name buf))
(set-buffer buf)
(funcall funref)
(when (and (not no-save)
(verilog-backward-up-list 1)
(verilog-backward-syntactic-ws)
(let ((back (point)))
- (forward-word -1)
+ (forward-word-strictly -1)
(cond
;;XX
((looking-at "\\<\\(always\\(_latch\\|_ff\\|_comb\\)?\\|case\\(\\|[xz]\\)\\|for\\(\\|each\\|ever\\)\\|i\\(f\\|nitial\\)\\|repeat\\|while\\)\\>")
(;-- any of begin|initial|while are complete statements; 'begin : foo' is also complete
t
- (forward-word -1)
+ (forward-word-strictly -1)
(while (or (= (preceding-char) ?\_)
(= (preceding-char) ?\@)
(= (preceding-char) ?\.))
- (forward-word -1))
+ (forward-word-strictly -1))
(cond
((looking-at "\\<else\\>")
t)
(verilog-re-search-backward "//" nil 'move)
(skip-chars-backward "/"))
((nth 4 state) ; in /* */ comment
- (verilog-re-search-backward "/\*" nil 'move))))
+ (verilog-re-search-backward "/\\*" nil 'move))))
(narrow-to-region bound (point))
(while (/= here (point))
(setq here (point))
(skip-chars-forward " \t\n\f")
)
((nth 4 state) ; in /* */ comment
- (verilog-re-search-forward "\*\/\\s-*" nil 'move))))
+ (verilog-re-search-forward "\\*/\\s-*" nil 'move))))
(narrow-to-region (point) bound)
(while (/= here (point))
(setq here (point)
(= (following-char) ?\`))
(progn
(forward-char 1)
- (forward-word 1)
+ (forward-word-strictly 1)
(skip-chars-forward " \t")))
((= (following-char) ?\[)
(progn
(save-excursion
(forward-line -1)
(skip-chars-forward " \t")
- (looking-at "\*")))
+ (looking-at "\\*")))
(insert "* ")))))
(defun verilog-comment-indent (&optional _arg)
(beginning-of-line)
(point-marker)
(end-of-line))))
- (if (re-search-backward " /\\* \[#-\]# \[a-zA-Z\]+ \[0-9\]+ ## \\*/" b t)
+ (if (re-search-backward " /\\* [#-]# [a-zA-Z]+ [0-9]+ ## \\*/" b t)
(progn
(replace-match " /* -# ## */")
(end-of-line))
(when (and sv-busstring
(not (equal sv-busstring (verilog-sig-bits sig))))
(when nil ; Debugging
- (message (concat "Warning, can't merge into single bus "
- sv-name bus
- ", the AUTOs may be wrong")))
+ (message (concat "Warning, can't merge into single bus %s%s"
+ ", the AUTOs may be wrong")
+ sv-name bus))
(setq buswarn ", Couldn't Merge"))
(if (verilog-sig-comment sig) (setq combo ", ..."))
(setq sv-memory (or sv-memory (verilog-sig-memory sig))
;;
(defun verilog-decls-princ (decls &optional header prefix)
- "For debug, dump the `verilog-read-decls' structure DECLS."
+ "For debug, dump the `verilog-read-decls' structure DECLS.
+Use optional HEADER and PREFIX."
(when decls
(if header (princ header))
(setq prefix (or prefix ""))
(princ "\n")))))
(defun verilog-modport-princ (modports &optional header prefix)
- "For debug, dump internal MODPORT structures, with HEADER and PREFIX."
+ "For debug, dump internal MODPORTS structures, with HEADER and PREFIX."
(when modports
(if header (princ header))
(while modports
(verilog-backward-open-paren)
(let (done)
(while (not done)
- (verilog-re-search-backward-quick "\\()\\|\\b[a-zA-Z0-9`_\$]\\|\\]\\)" nil nil) ; ] isn't word boundary
+ (verilog-re-search-backward-quick "\\()\\|\\b[a-zA-Z0-9`_$]\\|\\]\\)" nil nil) ; ] isn't word boundary
(cond ((looking-at ")")
(verilog-backward-open-paren))
(t (setq done t)))))
(while (looking-at "\\]")
(verilog-backward-open-bracket)
- (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_\$]\\|\\]\\)" nil nil))
+ (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_$]\\|\\]\\)" nil nil))
(skip-chars-backward "a-zA-Z0-9`_$"))
(defun verilog-read-inst-module-matcher ()
"Set match data 0 with module_name when point is inside instantiation."
(verilog-read-inst-backward-name)
;; Skip over instantiation name
- (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_\$]\\|)\\)" nil nil) ; ) isn't word boundary
+ (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_$]\\|)\\)" nil nil) ; ) isn't word boundary
;; Check for parameterized instantiations
(when (looking-at ")")
(verilog-backward-open-paren)
- (verilog-re-search-backward-quick "\\b[a-zA-Z0-9`_\$]" nil nil))
+ (verilog-re-search-backward-quick "\\b[a-zA-Z0-9`_$]" nil nil))
(skip-chars-backward "a-zA-Z0-9'_$")
;; #1 is legal syntax for gate primitives
(when (save-excursion
(verilog-backward-syntactic-ws-quick)
(eq ?# (char-before)))
- (verilog-re-search-backward-quick "\\b[a-zA-Z0-9`_\$]" nil nil)
+ (verilog-re-search-backward-quick "\\b[a-zA-Z0-9`_$]" nil nil)
(skip-chars-backward "a-zA-Z0-9'_$"))
- (looking-at "[a-zA-Z0-9`_\$]+")
+ (looking-at "[a-zA-Z0-9`_$]+")
;; Important: don't use match string, this must work with Emacs 19 font-lock on
(buffer-substring-no-properties (match-beginning 0) (match-end 0))
;; Caller assumes match-beginning/match-end is still set
"Return instance_name when point is inside instantiation."
(save-excursion
(verilog-read-inst-backward-name)
- (looking-at "[a-zA-Z0-9`_\$]+")
+ (looking-at "[a-zA-Z0-9`_$]+")
;; Important: don't use match string, this must work with Emacs 19 font-lock on
(buffer-substring-no-properties (match-beginning 0) (match-end 0))))
;; Due to "module x import y (" we must search for declaration begin
(verilog-re-search-backward-quick verilog-defun-re nil nil)
(goto-char (match-end 0))
- (verilog-re-search-forward-quick "\\b[a-zA-Z0-9`_\$]+" nil nil)
+ (verilog-re-search-forward-quick "\\b[a-zA-Z0-9`_$]+" nil nil)
;; Important: don't use match string, this must work with Emacs 19 font-lock on
(verilog-symbol-detick
(buffer-substring-no-properties (match-beginning 0) (match-end 0)) t)))
(save-excursion
(verilog-read-inst-backward-name)
;; Skip over instantiation name
- (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_\$]\\|)\\)" nil nil) ; ) isn't word boundary
+ (verilog-re-search-backward-quick "\\(\\b[a-zA-Z0-9`_$]\\|)\\)" nil nil) ; ) isn't word boundary
;; If there are parameterized instantiations
(when (looking-at ")")
(let ((end-pt (point))
param-name paren-beg-pt param-value)
(verilog-backward-open-paren)
(while (verilog-re-search-forward-quick "\\." end-pt t)
- (verilog-re-search-forward-quick "\\([a-zA-Z0-9`_\$]\\)" nil nil)
+ (verilog-re-search-forward-quick "\\([a-zA-Z0-9`_$]\\)" nil nil)
(skip-chars-backward "a-zA-Z0-9'_$")
- (looking-at "[a-zA-Z0-9`_\$]+")
+ (looking-at "[a-zA-Z0-9`_$]+")
(setq param-name (buffer-substring-no-properties
(match-beginning 0) (match-end 0)))
(verilog-re-search-forward-quick "(" nil nil)
(defun verilog-read-sub-decls-expr (submoddecls comment port expr)
"For `verilog-read-sub-decls-line', parse a subexpression and add signals."
- ;;(message "vrsde: ‘%s’" expr)
+ ;;(message "vrsde: `%s'" expr)
;; Replace special /*[....]*/ comments inserted by verilog-auto-inst-port
(setq expr (verilog-string-replace-matches "/\\*\\(\\[[^*]+\\]\\)\\*/" "\\1" nil nil expr))
;; Remove front operators
(let (sig vec multidim)
;; Remove leading reduction operators, etc
(setq expr (verilog-string-replace-matches "^\\s-*[---+~!|&]+\\s-*" "" nil nil expr))
- ;;(message "vrsde-ptop: ‘%s’" expr)
+ ;;(message "vrsde-ptop: `%s'" expr)
(cond ; Find \signal. Final space is part of escaped signal name
((string-match "^\\s-*\\(\\\\[^ \t\n\f]+\\s-\\)" expr)
- ;;(message "vrsde-s: ‘%s’" (match-string 1 expr))
+ ;;(message "vrsde-s: `%s'" (match-string 1 expr))
(setq sig (match-string 1 expr)
expr (substring expr (match-end 0))))
;; Find signal
((string-match "^\\s-*\\([a-zA-Z_][a-zA-Z_0-9]*\\)" expr)
- ;;(message "vrsde-s: ‘%s’" (match-string 1 expr))
+ ;;(message "vrsde-s: `%s'" (match-string 1 expr))
(setq sig (verilog-string-remove-spaces (match-string 1 expr))
expr (substring expr (match-end 0)))))
;; Find [vector] or [multi][multi][multi][vector]
(while (string-match "^\\s-*\\(\\[[^]]+\\]\\)" expr)
- ;;(message "vrsde-v: ‘%s’" (match-string 1 expr))
+ ;;(message "vrsde-v: `%s'" (match-string 1 expr))
(when vec (setq multidim (cons vec multidim)))
(setq vec (match-string 1 expr)
expr (substring expr (match-end 0))))
;; If found signal, and nothing unrecognized, add the signal
- ;;(message "vrsde-rem: ‘%s’" expr)
+ ;;(message "vrsde-rem: `%s'" expr)
(when (and sig (string-match "^\\s-*$" expr))
(verilog-read-sub-decls-sig submoddecls comment port sig vec multidim))))))
(let ((fns (verilog-library-filenames filename (buffer-file-name))))
(if fns
(set-buffer (find-file-noselect (car fns)))
- (error (concat (verilog-point-text)
- ": Can't find verilog-read-defines file: " filename)))))
+ (error "%s: Can't find verilog-read-defines file: %s"
+ (verilog-point-text) filename))))
(when recurse
(goto-char (point-min))
(while (re-search-forward "^\\s-*`include\\s-+\\([^ \t\n\f]+\\)" nil t)
line)
(if fns
(set-buffer (find-file-noselect (car fns)))
- (error (concat (verilog-point-text)
- ": Can't find verilog-getopt-file -f file: " filename)))
+ (error "%s: Can't find verilog-getopt-file -f file: %s"
+ (verilog-point-text) filename))
(goto-char (point-min))
(while (not (eobp))
(setq line (buffer-substring (point) (point-at-eol)))
;; something like a[b]. Sorry, it should be substituted into the parser
(setq symbol
(verilog-string-replace-matches
- "\[[^0-9: \t]+\]" "" nil nil
+ "\\[[^0-9: \t]+\\]" "" nil nil
(or (verilog-symbol-detick symbol nil)
(if verilog-auto-sense-defines-constant
"0"
;; Note this function is performance critical.
;; Do not call anything that requires disk access that cannot be cached.
(interactive)
- (unless dirnames (error "`verilog-library-directories' should include at least '.'"))
+ (unless dirnames
+ (error "`verilog-library-directories' should include at least `.'"))
(setq dirnames (reverse dirnames)) ; not nreverse
(let ((dirlist nil)
pattern dirfile dirfiles dirname root filename rest basefile)
(if (not (setq mif (verilog-module-inside-filename-p realname (car filenames))))
(setq filenames (cdr filenames))))
;; mif has correct form to become later elements of modi
- (cond (mif (setq modi mif))
- (t (setq modi nil)
- (or ignore-error
- (error (concat (verilog-point-text)
- ": Can't locate " module " module definition"
- (if (not (equal module realname))
- (concat " (Expanded macro to " realname ")")
- "")
- "\n Check the verilog-library-directories variable."
- "\n I looked in (if not listed, doesn't exist):\n\t"
- (mapconcat 'concat orig-filenames "\n\t"))))))
+ (setq modi mif)
+ (or mif ignore-error
+ (error
+ (concat
+ "%s: Can't locate %s module definition%s"
+ "\n Check the verilog-library-directories variable."
+ "\n I looked in (if not listed, doesn't exist):\n\t%s")
+ (verilog-point-text) module
+ (if (not (equal module realname))
+ (concat " (Expanded macro to " realname ")")
+ "")
+ (mapconcat 'concat orig-filenames "\n\t")))
(when (eval-when-compile (fboundp 'make-hash-table))
(unless verilog-modi-lookup-cache
(setq verilog-modi-lookup-cache
(defun verilog-modi-modport-lookup-one (modi name &optional ignore-error)
- "Given a MODI, return the declarations related to the given modport NAME."
+ "Given a MODI, return the declarations related to the given modport NAME.
+Report errors unless optional IGNORE-ERROR."
;; Recursive routine - see below
(let* ((realname (verilog-symbol-detick name t))
(modport (assoc name (verilog-decls-get-modports (verilog-modi-get-decls modi)))))
(or modport ignore-error
- (error (concat (verilog-point-text)
- ": Can't locate " name " modport definition"
- (if (not (equal name realname))
- (concat " (Expanded macro to " realname ")")
- ""))))
+ (error "%s: Can't locate %s modport definition%s"
+ (verilog-point-text) name
+ (if (not (equal name realname))
+ (concat " (Expanded macro to " realname ")")
+ "")))
(let* ((decls (verilog-modport-decls modport))
(clks (verilog-modport-clockings modport)))
;; Now expand any clocking's
(save-excursion
(goto-char (point-min))
;; It's hard to distinguish modules; we'll instead search for pins.
- (while (verilog-re-search-forward-quick "\\.\\s *[a-zA-Z0-9`_\$]+\\s *(\\s *[a-zA-Z0-9`_\$]+\\s *)" nil t)
+ (while (verilog-re-search-forward-quick "\\.\\s *[a-zA-Z0-9`_$]+\\s *(\\s *[a-zA-Z0-9`_$]+\\s *)" nil t)
(verilog-backward-open-paren) ; Inst start
(cond
((= (preceding-char) ?\#) ; #(...) parameter section, not pin. Skip.
(t
;; Delete identical interconnect
(let ((case-fold-search nil)) ; So we don't convert upper-to-lower, etc
- (while (verilog-re-search-forward-quick "\\.\\s *\\([a-zA-Z0-9`_\$]+\\)*\\s *(\\s *\\1\\s *)\\s *" end-pt t)
+ (while (verilog-re-search-forward-quick "\\.\\s *\\([a-zA-Z0-9`_$]+\\)*\\s *(\\s *\\1\\s *)\\s *" end-pt t)
(delete-region (match-beginning 0) (match-end 0))
(setq end-pt (- end-pt (- (match-end 0) (match-beginning 0)))) ; Keep it correct
(while (or (looking-at "[ \t\n\f,]+")
instantiation name.
If a regular expression is provided, the @ character will be replaced
- with the first \(\) grouping that matches against the cell name. Using a
- regexp of \"\\([0-9]+\\)\" provides identical values for @ as when no
+ with the first () grouping that matches against the cell name. Using a
+ regexp of `\\([0-9]+\\)' provides identical values for @ as when no
regexp is provided. If you use multiple layers of parenthesis,
- \"test\\([^0-9]+\\)_\\([0-9]+\\)\" would replace @ with non-number
+ `test\\([^0-9]+\\)_\\([0-9]+\\)' would replace @ with non-number
characters after test and before _, whereas
- \"\\(test\\([a-z]+\\)_\\([0-9]+\\)\\)\" would replace @ with the entire
+ `\\(test\\([a-z]+\\)_\\([0-9]+\\)\\)' would replace @ with the entire
match.
For example:
By default, AUTORESET will include the width of the signal in the
autos, SystemVerilog designs may want to change this. To control
this behavior, see `verilog-auto-reset-widths'. In some cases
-AUTORESET must use a '0 assignment and it will print NOWIDTH; use
+AUTORESET must use a \\='0 assignment and it will print NOWIDTH; use
`verilog-auto-reset-widths' unbased to prevent this.
AUTORESET ties signals to deasserted, which is presumed to be zero.